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BLESEPD.GIF (165 Byte)


In this section we offer some IP cores for FPGAs as well as some software packages for common microcontrollers.
 
1 Software Packages for the ATMEL ATmega Microcontroller Famliy:

1.1 "IbDR AES Package"
Key features:
• Highly optimized for low memory requirements and fast execution time, exclusively written in assembly language and targeted to maximum usage of MCU registers
• Supports AES-128, AES-192 and AES-256
• Configurable in wide range: For maximum processing speed, for low memory occupancy, for usage of EEPROM memory for constant storage
• Test environment and test patterns taken from AES FIPS PUB 197 included for verification after changes of the code
• Assembler Code available for easy implementation and modification
 

 Click here to view the documentation of the package

 

 
2 IP Cores for XILINX and ALTERA FPGAs / CPLDs:
2.1 VHDL IP Core AES for XILINX PFGAs:
Optimized IP Core to perform the AES algorithm in several of the XILINX FPGAs. Supports AES-128, AES-192 and AES-256
2.2 VHDL IP Core TDES for XILINX / ALTERA FPGAs / CPLDs:
Optimized IP Core to perform the TDES/DES algorithm in several of the XILINX and ALTERA FPGAs. Supports AES-128, AES-192 and AES-256
 
3 Generic Crypto Modules written in C/C++ Language:
3.1 Standard DES/TDES Module "TDES":
Standard TDES module written in a bit operating style. Extremely fast as a result of data processing in processor registers wherever possible. Compatible to standard DES if all 3 keys are identical
3.2 Standard RSA Module "RSA:
Standard RSA module written in a bit operating style. Extremely fast as a result of data processing in processor registers wherever possible
3.3 Standard ENIGMA Module "ENIGMA":
Standard ENIGMA module written in a bit operating style. Extremely fast as a result of data processing in processor registers wherever possible
. Compatible with the "-x"-option of vi under UNIX including the hidden feature "shuffle"
 

                                            BLESEPD.GIF (165 Byte)


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Stand: Januar 2015